Our TCP/IP core is a hardware implementation of the TCP/IP protocol. It does not require any software and can easily be integrated in your design.

It exists in 2 versions:

  • 1 Gbit/s
  • 10 Gbit/s

The design is highly efficient and realizes near maximum data throughput. Additionally, the TCP/IP core has an extremely low latency.

The cores have been successfully integrated in projects targeted at several different Xilinx and Altera devices.